Variables used in the following cases are defined as below
__attribute__((aligned(4))) unsigned char rec_buff[rec_buff_Len]={0};
__attribute__((aligned(4))) unsigned char trans_buff[trans_buff_Len] = {0x0c, 0x00, 0x00, 0x00, 0x11, 0x22, 0x33, 0x44,0x55, 0x66, 0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc};
API-UART-CASE1:UART DMA MODE
| Function | Sub-Function | APIs | Description | Update Status |
| irq_handler() | Rx IRQ | if(dma_chn_irq_status_get() & FLD_DMA_CHN_UART_RX == FLD_DMA_CHN_UART_RX) | get IRQ status of uart | 2019-1-10 |
| dma_chn_irq_status_clr() | dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX) | clear UART RX interrupt flag |
| uart_dmairq_rx_cnt++ | interrupt processing function |
| Tx IRQ | if(dma_chn_irq_status_get() & FLD_DMA_CHN_UART_TX == FLD_DMA_CHN_UART_TX) | Determine whether TX interrupt flag is right in DMA MODE |
| dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX) | Clear UART TX interrupt flag |
| uart_dmairq_tx_cnt++ | Interrupt processing function |
| main() | cpu_wakeup_init() | CPU initialization function [Mandatory] |
| clock_init() | clock_init(SYS_CLK_24M_Crystal) | Clock initialization function, System Clock is 24M RC by default [optional] |
| rf_drv_init() | rf_drv_init(RF_MODE_BLE_1M) | RF mode initialization [optional] |
| gpio_init() | gpio_init(1) | GPIO initialization: set the initialization status of all GPIOs [optional] |
| user_init() | uart_recbuff_init() | uart_recbuff_init( (unsigned short *)&rec_buff, sizeof(rec_buff) ) | Data receive buffer initialization function |
| uart_gpio_set() | uart_gpio_set(UART_TX_PA2, UART_RX_PA0) | Set uart tx/rx pin |
| uart_reset() | Reset uart digital registers from 0x90 ~ 0x9f |
| uart_init_baudrate() | uart_init_baudrate(115200,CLOCK_SYS_CLOCK_HZ,PARITY_NONE, STOP_BIT_ONE) | UART module initialization |
| uart_dma_enable() | uart_dma_enable(1, 1) | Enable UART DMA function |
| irq_enable_type() | irq_enable_type(FLD_IRQ_DMA_EN) | Enable DMA irq |
| dma_chn_irq_enable() | dma_chn_irq_enable(FLD_DMA_CHN_UART_RX Ι FLD_DMA_CHN_UART_TX, 1) | Enable Uart Rx/Tx dma irq |
| uart_irq_enable() | uart_irq_enable(0, 0) | Disable uart RX/TX irq |
| irq_enable() | enable global interrupt |
| main_loop() | uart_dma_send() | uart_dma_send( (unsigned short*)&trans_buff ) | Uart send data |
API-UART-CASE2:UART NDMA MODE
| Function | Sub-Function | APIs | Description | Update Status |
| irq_handler() | please refer to Driver Demo | Interrupt handler function [Mandatory] | 2019-1-10 |
| main() | cpu_wakeup_init() | CPU initialization function [Mandatory] |
| clock_init() | clock_init(SYS_CLK_24M_Crystal) | Clock initialization function, System Clock is 24M RC by default [optional] |
| rf_drv_init() | rf_drv_init(RF_MODE_BLE_1M) | RF mode initialization [optional] |
| gpio_init() | gpio_init(1) | GPIO initialization: set the initialization status of all GPIOs [optional] |
| user_init() | uart_recbuff_init() | uart_recbuff_init( (unsigned short *)&rec_buff, sizeof(rec_buff) ) | Data receive buffer initialization function |
| uart_gpio_set() | uart_gpio_set(UART_TX_PA2, UART_RX_PA0) | Set uart tx/rx pin |
| uart_reset() | Reset uart digital registers from 0x90 ~ 0x9f |
| uart_init_baudrate() | uart_init_baudrate(115200,CLOCK_SYS_CLOCK_HZ,PARITY_NONE, STOP_BIT_ONE) | UART module initialization |
| uart_dma_enable() | uart_dma_enable(0, 0) | Disable UART DMA function |
| irq_disable_type() | irq_disable_type(FLD_IRQ_DMA_EN) | Clear DMA irq |
| dma_chn_irq_enable() | dma_chn_irq_enable(FLD_DMA_CHN_UART_RX Ι FLD_DMA_CHN_UART_TX, 0) | Disable Rx/Tx dma irq |
| uart_irq_enable() | uart_irq_enable(1, 0) | Enable Uart RX irq |
| uart_ndma_irq_triglevel() | uart_ndma_irq_triglevel(1,0) | Set the trigger level |
| irq_enable() | Interrupt enable |
| main_loop() | uart_ndma_send_byte() | uart_ndma_send_byte(trans_buff[i]) | Uart send data |
API-UART-CASE3:UART CTS MODE
| Function | Sub-Function | APIs | Description | Update Status |
| irq_handler() | None | Interrupt handler function [Mandatory] | 2019-1-10 |
| main() | cpu_wakeup_init() | CPU initialization function [Mandatory] |
| clock_init() | clock_init(SYS_CLK_24M_Crystal) | Clock initialization function, System Clock is 24M RC by default [optional] |
| rf_drv_init() | rf_drv_init(RF_MODE_BLE_1M) | RF mode initialization [optional] |
| gpio_init() | gpio_init(1) | GPIO initialization: set the initialization status of all GPIOs [optional] |
| user_init() | uart_recbuff_init() | uart_recbuff_init( (unsigned short *)&rec_buff, sizeof(rec_buff) ) | Data receive buffer initialization function |
| uart_gpio_set() | uart_gpio_set(UART_TX_PA2, UART_RX_PA0) | Set uart tx/rx pin |
| uart_reset() | Reset uart digital registers from 0x90 ~ 0x9f |
| uart_init_baudrate() | uart_init_baudrate(115200,CLOCK_SYS_CLOCK_HZ,PARITY_NONE, STOP_BIT_ONE) | UART module initialization |
| uart_set_cts() | uart_set_cts(1, STOP_VOLT, UART_CTS_PA3) | Configure CTS pin |
| uart_dma_enable() | uart_dma_enable(0, 0) | Disable UART DMA function |
| irq_disable_type() | irq_disable_type(FLD_IRQ_DMA_EN) | Clear DMA irq |
| dma_chn_irq_enable() | dma_chn_irq_enable(FLD_DMA_CHN_UART_RX Ι FLD_DMA_CHN_UART_TX, 0) | Disable Uart Rx/Tx dma irq |
| uart_irq_enable() | uart_irq_enable(0, 0) | Disable uart RX/TX irq |
| irq_enable() | Interrupt enable |
| main_loop() | uart_ndma_send_byte() | uart_ndma_send_byte(trans_buff[i]) | Uart send data |
API-UART-CASE4:UART RTS MODE
| Function | Sub-Function | APIs | Description | Update Status |
| irq_handler() | None | Interrupt handler function [Mandatory] | 2019-1-10 |
| main() | cpu_wakeup_init() | CPU initialization function [Mandatory] |
| clock_init() | clock_init(SYS_CLK_24M_Crystal) | Clock initialization function, System Clock is 24M RC by default [optional] |
| rf_drv_init() | rf_drv_init(RF_MODE_BLE_1M) | RF mode initialization [optional] |
| gpio_init() | gpio_init(1) | GPIO initialization: set the initialization status of all GPIOs [optional] |
| user_init() | uart_recbuff_init() | uart_recbuff_init( (unsigned short *)&rec_buff, sizeof(rec_buff) ) | Data receive buffer initialization function |
| uart_gpio_set() | uart_gpio_set(UART_TX_PA2, UART_RX_PA0) | Set uart tx/rx pin |
| uart_reset() | Reset uart digital registers from 0x90 ~ 0x9f |
| uart_init_baudrate() | uart_init_baudrate(115200,CLOCK_SYS_CLOCK_HZ,PARITY_NONE, STOP_BIT_ONE) | UART module initialization |
| uart_set_rts() | (uart_set_rts(1, RTS_MODE, RTS_THRESH, RTS_INVERT,UART_RTS_PA4) | Configure RTS pin |
| uart_dma_enable() | uart_dma_enable(0, 0) | Disable UART DMA function |
| irq_disable_type() | irq_disable_type(FLD_IRQ_DMA_EN) | Clear DMA irq |
| dma_chn_irq_enable() | dma_chn_irq_enable(FLD_DMA_CHN_UART_RX Ι FLD_DMA_CHN_UART_TX, 0) | Disable Uart Rx/Tx dma irq |
| uart_irq_enable() | uart_irq_enable(1, 0) | Enable Uart RX irq |
| uart_ndma_irq_triglevel() | uart_ndma_irq_triglevel(1,0) | Set the trigger level |
| irq_enable() | Interrupt enable |
| main_loop() | None | Main program loop |
History Record
| Date | Description | Author |
| 2019-1-10 | initial release | SP/LJW |
