Introduction

The TLSR8258F512 embeds UART(Universal Asynchronous Receiver/Transmitter) to implement full-duplex transmission and reception via UART Tx and Rx interface. The clock source of the UART module is the system clock. The main functions supported are as follows:

Both Tx and Rx interface are 4-layer FIFO(First In First Out)
Support DMA mode, Maximum of baudrate: 4Mbps
Support hardware flow control(RTS and CTS)
Support ISO7816 prococol(ISO/IEC 7816 integrated circuit card, especially smart card). In this mode, half-duplex communication(transmission or reception) is supported via the shared 7816_TRX interface, for more...

UART Mode-DMA

UART supports DMA mode, which can greatly simplify data transmission and reception process. Besides, parallelism between DMA and MCU can improve the efficiency of the program. To use the DMA mode, in addition to the relevant configuration, the data structure sent must follow the specific requirements below:

The defined transmition or reception buffer requires 4-byte alignment
The first 4 bytes are the length of the transmitted data packet or the length of the received data packet. The low byte is first, as shown in the following figure.

Block Diagram of Tx Buffer Format in DMA Mode

UART Mode-NDMA

In Not DMA(NDMA) mode, reception is implemented by an interrupt processing mechanism, and sending is done through the state machine. Each time the data is sent or received, it is processed according to a single byte. The whole process is slower than the DMA mode.

UART APIs List

In order to facilitate users to quickly develop products according to their own needs, TSI provide the following related APIs and examples.

APIs list	Description	Example	Update Date	Status
uart_reset()	reset the module of uart	-	2019-1-10	Done
uart_gpio_set()	set the port for uart module	API-UART-CASE1	2019-1-10	Done
uart_recbuff_init()	initiate the buffer for receiving data	API-UART-CASE1	2019-1-10	Done
uart_init()	set parameter for uart module(g_uart_div, g_bwpc, parity-bit, stop-bit)	-	2019-1-10	Done
uart_init_baudrate()	set parameter for uart module(baudrate,system clock, parity-bit, stop-bit)	API-UART-CASE1	2019-1-10	Done
uart_dma_enable()	enable dma mode	API-UART-CASE1	2019-1-10	Done
uart_dma_send()	send a packet of data in DMA mode	API-UART-CASE1	2019-1-10	Done
uart_send_byte()	send a byte of data in DMA mode	-	2019-1-10	Done
uart_ndma_send_byte()	send a byte of data in NDMA mode	API-UART-CASE2	2019-1-10	Done
uart_ndma_irq_triglevel()	set level of trigger for irq in NDMA mode	API-UART-CASE2	2019-1-10	Done
uart_ndmairq_get()	set level of trigger for irq in NDMA mode	-	2019-1-10	Done
uart_is_parity_error()	determine if the parity is error	-	2019-1-10	Done
uart_clear_parity_error()	clear the parity error	-	2019-1-10	Done
uart_set_rts()	set RTS for uart	API-UART-CASE4	2019-1-10	Done
uart_set_rts_level()	set the level of RTS for uart	API-UART-CASE4	2019-1-10	Done
uart_set_cts()	set CTS for uart	API-UART-CASE3	2019-1-10	Done
uart_irq_enable()	enable irq of uart	API-UART-CASE2	2019-1-10	Done

TSI provides the following examples of this module to help users quickly understand and apply related modules.

Examples list	Description	Update Date	Status
API-UART-CASE1	UART in DMA mode	2019-1-10	Done
API-UART-CASE2	UART in Not DMA mode	2019-1-10	Done
API-UART-CASE3	UART in DMA mode and enable CTS	2019-1-10	Done
API-UART-CASE4	UART in DMA mode and enable RTS	2019-1-10	Done

History Record

Date	Description	Author
2019-1-10	initial release	LJW
2019-8-15	update api name for application	LJW